Speed sign recognition fits efficient chips with pruning and integer math
Replay Pruning and Few-Bit Integer Inference for Hardware-Efficient Speed-Sign Recognition
Computer Vision and Pattern RecognitionHardware ArchitectureMachine Learning
Summary
Recognizing speed-limit signs using small, efficient computer chips is challenging because they have limited memory and power. The authors developed a two-step system: one part finds signs in images, and the other reads their speed limits using very simple math that computers can run quickly. They shrink the detection model by carefully removing unnecessary parts, then fix it so performance stays the same or even improves. Their complete system runs fast and accurately on automotive cameras using only public training data.
What this means in practice
- •For automotive system designers: Build low-power, fast speed-sign recognition modules for in-car cameras using compressed detection and integer-based classification.
- •For embedded system developers: Implement efficient object detection and classification on constrained hardware with pruning and integer arithmetic for real-time visual tasks.
Authors
Se Un Park, Kyungkeon Chung, Huigeol Kim, Junyoung Park
Abstract
Speed-limit sign recognition on an automotive camera system-on-chip (SoC) must fit a detector and a classifier (the reader) into the memory, arithmetic, and energy budgets of the device. In our two-stage recognizer, the detector, a YOLO-family network with ReLU and hard-sigmoid operators, is compressed by channel replay: an iterative pruning cascade identifies the channels to remove, the recorded deletions are replayed on the original task-trained network, the parent, and one continuous knowledge-distillation recovery follows. On a YOLOv5n, replay removes 60.3% of the parameters at the accuracy of the parent and, in validation mAP50-95 over five matched seeds, outperforms iterative pruning and training from scratch, and its per-step variant (per-step replay) is the most accurate pruning method. On a YOLOv8n, replay and per-step replay outperform every other method and the unpruned parent. The reader, a five-layer CNN with 18k parameters, and the post-processing of the YOLOv5n and YOLOv8n heads use integer arithmetic only. With 4-bit weights and 8-bit activations (W4A8), the reader matches FP32 accuracy in 12.1 KB of on-chip memory, and an executable streaming model reproduces the INT8 class predictions of its runtime on all 9,850 test crops. On a Jetson AGX Orin, INT8 is faster than FP16 only in the implicit formulation of TensorRT, and the replay detector runs fastest on the deep-learning accelerator (DLA). Trained on public data only, the combined system of 0.72 M parameters recognizes 95.2% of the signs of a held-out automotive camera at 90% precision and 94 frames per second.