Trinity improves chip floorplans with a unified differentiable physics model
Trinity: One Differentiable Physics for Training, Refining and Scoring Generative Floorplanners
Machine LearningHardware Architecture
Summary
Designing the layout of a computer chip involves arranging blocks so they fit well, don’t overlap, and connect efficiently. The authors show that previous methods rely on complicated fixes after generating layouts rather than learning how to create better ones directly. They introduce Trinity, a new method that uses a smooth physics model to train and improve floorplans throughout the entire process, making the layouts better and faster to produce. This approach reduces errors and costs compared to existing techniques and speeds up the layout refinement significantly.
What this means in practice
- •For chip designers: Generate and refine chip block layouts more efficiently with learned corrections integrated in the design process.
- •For eda tool developers: Incorporate Trinity's differentiable physics approach to speed up layout refinement and improve scoring of generative floorplanning models.
Authors
Shih-Ying Yeh, Tzu-Sian Wang, Xuehai Wang, Jia-Hua Lee, Daniel Z. Kaplan, Ming-Qi Xu, Wuqian Tang, Chun-Yao Wang, Shang-Hong Lai, Chun-Yi Lee
Abstract
Floorplanning arranges the blocks of a chip and decides their shapes under objectives that press blocks together, short wirelength and a small outline, and constraints that hold them apart, non-overlap, clusters, MIB shapes and boundary blocks. Recent diffusion placers train on reference layouts alone and leave this coupled system to guidance, post-hoc loops and a legalizer, reporting only the endpoint, which hides what the generator contributes. We re-implement four of them under one recipe on FloorSet, score raw, refined and legalized layouts on one scale, and propose Trinity, a flow-matching floorplanner whose six differentiable functions for the constraints and objectives are its training loss term, the energy of a closed-form refiner after sampling and the base of a soft cost for every stage. The network thus learns the correction prior placers apply in their samplers, and sampling needs no guidance. Stage by stage, the training term lowers a plain transformer's raw soft cost by 26% and matters most at short budgets, the shared refiner decides more of the final cost than the generator and matches a ported placer's loop in 16 to 660 times fewer steps, Trinity's refined soft cost is 36% below the best ported pipeline, the soft cost ranks settings as the contest's hard cost does, and on the FloorSet val set the pipeline reaches a mean hard cost of 1.014 in 1.63 s per case.