Improved code limits help fix chip errors and manage heat better

Improved bounds for constant-power and low-power error-correcting cooling codes

Information Theory

Summary

Computers use tiny wires called on-chip buses that carry electrical signals, which can cause heat and power problems. The authors studied special codes that not only correct errors but also control power use and heat on these wires. They found better limits for how many messages these codes can handle while keeping power and heat in check. Their work shows that these new limits are close to the best possible and can guide designing better chip communication.

What this means in practice

  • For chip designers: Design reliable on-chip communication that keeps power use steady and reduces overheating risks using improved error-correcting code limits.
  • For electronics manufacturers: Create energy-efficient integrated circuits that maintain signal accuracy with new coding techniques controlling power and thermal effects on buses.

A theory result. No direct application yet.

Authors

Tingting Tong, Sihuang Hu

Abstract

Low-power error-correcting cooling (LPECC) codes and constant-power error-correcting cooling (CPECC) codes provide error correction while controlling power consumption and thermal effects in on-chip buses. In this paper, we study binary CPECC and LPECC codes with \(e=w-3\). For CPECC codes, we extend the applicability of the upper bound previously obtained by Zhao and Zhang from the quadratic-order condition \(w\ge 2t(t+1)+2\) to \(w\ge w_0(t)\), where \(w_0(t)\sim \sqrt{2}\,t^{3/2}\). Using Steiner systems, we show that the CPECC bound is attainable and asymptotically tight for fixed \(t,w\). For LPECC codes, we establish the new upper bound \(\left\lfloor\frac{\binom{n+2}{3}}{\binom{w+t}{3}}\right\rfloor\) for \(w\ge μ(t)\), where \(μ(t)\sim \sqrt{2}\,t^{3/2}\). This bound is strictly smaller than the previous bound of Zhao and Zhang whenever both apply, and is asymptotically tight for fixed \(t,w\) in the stated range.