Ferroelectric Josephson transistors boost scalable low-power cryogenic memory
Highly Scalable Selectorless Cryogenic Memory Array Using Ferroelectric Josephson Field-Effect Transistors
Emerging Technologies
Summary
Reliable memory that works well at extremely low temperatures is crucial for building very large quantum computers. The authors introduce a new type of memory using special transistors that combine superconductors with ferroelectric materials. These devices store data without needing extra components, saving space and power while reading data quickly and efficiently. They also created a detailed model to show that this new memory structure works well and can scale to large sizes, which could help future quantum and high-performance computers run better.
What this means in practice
- •For quantum computer engineers: Build large-scale cryogenic memory arrays that efficiently store and retrieve quantum control data with ultra-low power use and high speed.
- •For space systems designers: Implement memory systems in space applications that operate reliably with very low energy consumption at cryogenic temperatures.
Authors
Saheeb Ahmad, Shamiul Alam
Abstract
Scalable memory systems that satisfy the temperature, speed, and energy requirements of cryogenic environments are essential for the development of large-scale quantum computers. They may also benefit high-performance computing and space applications. However, existing cryogenic memory technologies often suffer from limited scalability, low operating speed, and/or high power consumption, restricting the scalability of target applications. Ferroelectric Josephson field-effect transistors (Fe-JoFETs), which combine ferroelectric polarization with the superconducting properties of Josephson junctions, offer a promising solution. The ferroelectric layer enables nonvolatile storage capability, while the Josephson junction supports high-speed, energy-efficient operations. In this work, we leverage Fe-JoFETs to develop a highly scalable, ultra-low-power, nonvolatile cryogenic memory array that does not need additional selector devices for random access. Moreover, the superconducting component of Fe-JoFET provides a binary decision during read, eliminating the need for sensing peripheral circuitry. We first develop a physics-based Verilog-A compact model for Fe-JoFETs and use it to verify the functionality of the proposed memory array. By eliminating both selector and sensing circuitry, the proposed memory architecture offers higher scalability than existing technologies. The ultra-low-power operation of this memory also makes it compatible with strict power budgets of cryogenic applications.