Papers for

electronics manufacturing teams

Papers whose findings have a practical use for this group, as judged from the abstract. Open a paper to read what it means in practice.

Pcbrouteagent automates complex printed circuit board routing tasks

PCBRouteAgent: How Close Are LLM Agents to Becoming PCB Routing Engineers?

Abstract: Automating printed circuit board (PCB) routing requires coordinating board-level connectivity decisions with geometric execution under strict design rules. Although recent agents can interact with native routing tools, reliable routing on complex boards remains challenging. We present PCBRouteAgent, a multimodal PCB routing agent inspired by how human engineers coordinate global strategy with local execution. A Global Routing Planner combines board images and structured electrical and geometric information to specify connection topology, routing order, corridors, and layer transitions. A Detailed Routing Executor realizes these guides through KiCad's native routing engine and performs bounded local recovery. Unresolved failures are returned as structured feedback, enabling targeted guide revisions while preserving accepted routes. We evaluate PCBRouteAgent on 247 synthetic and real-world boards from four PCBWorld-Bench test splits. It achieves clean-pass rates of 100%, 94.9%, 100%, and 40% on D2, D3-A, D3-B, and D3-C, respectively. On the three real-world subsets, PCBRouteAgent outperforms the best evaluated baseline in clean-pass rate by 13.9, 36, and 10 percentage points, respectively.

Thu 5 NovArtificial Intelligence
The gist
Printed circuit boards (PCBs) need carefully planned wiring to work properly, but routing these connections is hard and requires following strict rules. The authors created PCBRouteAgent, a system that mimics how human engineers plan and execute PCB wiring by combining overall strategy with detailed adjustments. It uses images and electrical info to plan routing paths and then works with routing software to draw wires, fixing errors as it goes. In tests on hundreds of PCB designs, PCBRouteAgent routed boards more accurately than previous methods.
Open → 2611.08175v1

Enhanced 2D reconstruction method improves cone beam laminography images

PSF-Informed Reconstruction: An Enhanced 2D Directional Filtered Backprojection Method for Cone-Beam Rotary Computed Laminography

Abstract: Cone-beam rotary computed laminography (CL) presents a viable alternative to cone-beam CT for imaging objects with high aspect ratios. Conventional reconstruction techniques, such as CL-FBP and CL-FDK, often yield suboptimal results charac?terized by pronounced superimposition artifacts, reduced contrast,and blurred edges, primarily due to their reliance on 1D row-wise filtering along detector rows. To address these limitations and improve reconstruction quality, we proposed a novel 2D directional filtered backprojection (DFBP) method based on the point spread function (PSF). First, an exact expression for the projection process is derived by establishing the relationship between a reconstructed pixel and its corresponding projection point on the detector. Second, a revised backprojection process incorporating two weighting factors is introduced to counteract the nonlinearity inherent in conventional backprojection, leading to a simplified PSF formulation. Third, to circumvent the computational burden of 3D image space filtering,an approximate method by linearizing the coordinate relationship in Fourier space under some assumptions is developed that transfers the 3D filtering operation to the 2D projection space. This approach facilitates the derivation of a formally simple yet effective 2D direc?tional filter, which integrates a 2D von Hann window and a 2D sinc window. Experimental results demonstrate that the proposed method produces reconstructions with superior contrast, sharper boundaries,and fewer superimposition artifacts compared to CL-FBP and CL?FDK. Moreover, it enables more accurate recovery of internal structures, such as bubble defects and electronic components.

Sat 31 OctComputer Vision and Pattern Recognition
The gist
Imaging long, thin objects with traditional 3D scans can produce blurry images with confusing overlaps. The authors came up with a new way to process scan data that handles the blurriness better by using a two-dimensional filter informed by how the scan spreads out. Their approach sharpens the images, increases contrast, and reduces confusing overlaps, making details like small defects inside objects easier to see.
Open → 2611.00953v1

Hierarchical reinforcement learning improves chip routing and switch placement

Validity-Preserving Hierarchical RL for Joint Routing and Switch Placement in EDA

Abstract: Routing and switch placement are fundamental combinatorial optimization problems in chip design, requiring the joint optimization of routing topology and physical placement under strict structural, geometric and logical constraints. Existing approaches typically rely on carefully engineered heuristics that incorporate strong problem-specific biases to navigate the enormous space of possible designs. In this work, we introduce a hierarchical reinforcement learning framework for joint routing and switch placement at the level of logical communication routes. Starting from a minimal routing graph, our method progressively constructs increasingly expressive solutions through three coupled operations: switch expansion, switch placement, and route refinement. These operations preserve routing validity by construction, restricting exploration to feasible configurations where every communicating initiator-target pair has one assigned loop-free route. We explore the induced solution space using Gumbel Monte Carlo Tree Search, showing that neural-guided search substantially improves solution quality over non-learning optimization methods. Furthermore, pretraining across floorplans provides a strong initialization for fine-tuning on unseen instances.

Wed 30 SeptMachine Learning
The gist
Designing the internal pathways and placing switches in computer chips is very complicated because there are many rules and constraints to follow. The authors propose a step-by-step learning approach that builds valid designs by adding switches, placing them, and improving routes while always keeping the design workable. Their method uses a smart search guided by AI to find better solutions than traditional methods, and it can learn from past designs to perform well on new chip layouts.
Open → 2609.39749v1