Proba prefetcher boosts memory speed and cuts traffic on multicore systems
Proba: A High-Performance, Low-Traffic Probabilistic Spatial Memory Streaming Prefetcher
Hardware Architecture
Summary
Computers move data from memory slowly, causing delays. Prefetchers try to guess what data will be needed next to speed things up. The authors made Proba, a new prefetcher that learns patterns better and adjusts how much it predicts based on how well it’s doing. This balance lets Proba speed up programs more than past designs while causing less extra memory traffic. Proba works well both when many programs run together and when memory is limited.
What this means in practice
- •For computer architects: Improve processor performance by implementing Proba to more efficiently predict memory accesses and reduce DRAM traffic under multicore workloads.
- •For embedded systems engineers: Enhance memory-constrained device speed by applying Proba’s adaptive prefetching to balance accuracy and coverage.
Authors
Yinting Huang, Jacky Wong, Sam Ainsworth
Abstract
Spatial Memory Streaming (SMS) prefetchers exploit recurring spatial access patterns across memory regions to predict future accesses. Despite their effectiveness, existing SMS-based designs suffer from coarse control over aggressiveness and limited adaptability to dynamic program behavior and historical patterns. In this work, we present Proba, a feedback-directed SMS-based prefetcher that integrates probabilistic pattern updates, marginal accuracy decision-making, and pattern accumulation over several trigger features to achieve fine-grained accuracy-coverage trade-offs. When accuracy deteriorates, Proba moderates its aggressiveness to prioritize accurate prefetches; conversely, when accuracy rises, it expands its coverage. Proba achieves higher speedups than any other SMS-based prefetcher while being vastly more efficient in DRAM traffic. This culminates in a large performance gap between Proba and other techniques in multicore and DRAM-constrained scenarios without harming single-threaded throughput.