Unified FeFET in-memory system boosts neuro-symbolic AI efficiency
UnO-NeSy: Optimizing Neuro-Symbolic Computing with Unified FeFET Based In-Memory System
Emerging Technologies
Summary
Combining neural networks and logical reasoning in AI is powerful but needs lots of memory and energy. The authors designed a new hardware system that processes both neural and symbolic tasks using special memory devices called FeFETs. They also built a simulator and an optimizer to find the best settings for accuracy and energy use. This system improves energy efficiency by over 60% and reduces energy use by nearly 40% while keeping high accuracy. It shows a promising way to build low-power AI hardware that can think logically and learn.
What this means in practice
- •For embedded system designers: Develop low-power AI chips that efficiently combine neural and symbolic reasoning on embedded devices with limited energy.$Commercial implications: Enables energy-efficient neuro-symbolic AI processors for consumer electronics and IoT devices, opening commercial markets for smarter edge hardware.
- •For hardware engineers: Use the unified FeFET compute-in-memory architecture and simulator to optimize hardware configurations for specific AI workloads balancing energy and accuracy.
Authors
Yifei Zhou, Zhiying Zhu, Yuxiao Jiang, Yihan Mao, Jiaqi Zhang, Yuxiao Yang, Zhiguo Shi, Zheyu Yan, Cheng Zhuo, Xunzhao Yin
Abstract
Neuro-symbolic artificial intelligence (NeSy AI) combines neural perception with symbolic reasoning, enabling logical reasoning. Hyperdimensional computing (HDC) is promising for NeSy AI, owing to its high parallelism and strong robustness to noise. However, the dense neural operations and memory-intensive symbolic inference in NeSy impose a severe "memory wall" bottleneck. Existing NeSy accelerators either focus solely on symbolic kernels or rely on conventional digital architectures, lacking a unified and energy-efficient hardware substrate. Moreover, exploring optimal hardware design configurations often requires costly trial-and-error. In this work, we propose UnO-NeSy, a unified CiM framework for optimizing NeSy computing. UnO-NeSy consists of UnO-CiM, an ultra-low-power NeSy architecture based on a homogeneous 2FeFET--2R compute-in-memory (CiM) array that supports both neural computation and HDC reasoning, and UnO-Sim, a cross-workload, end-to-end CiM simulator that models device non-idealities, neural quantization effects, and HDC execution behavior for accurate system-level evaluation. Built on UnO-Sim, we further develop an automated optimizer to identify workload-specific operating points under coupled energy, accuracy, and hardware constraints. By optimizing the operating configuration of the baseline 2FeFET--2R design, UnO-NeSy achieves $61.8\%$ higher energy efficiency and $38.2\%$ lower full-system inference energy. Across seven RAVEN configurations, UnO-NeSy achieves $96.2\%$ average reasoning accuracy under hardware non-idealities, demonstrating a practical and scalable path toward ultra-low-power NeSy hardware.