Heterogeneous graph neural network improves circuit routability prediction accuracy
HGRP: Heterogeneous Graph Neural Network for Routability Prediction
Machine Learning
Summary
Predicting how easily a circuit can be connected (routed) is important for designing better chips. Existing methods often struggle to consider all aspects like circuit logic, layout, and wiring resources together. The authors propose a new method called HGRP that treats components, connections, and wiring grids as different types of nodes in a graph. This helps capture the complex relationships between how circuits are built and how well they can be routed, leading to much better prediction accuracy. They tested this method and found a significant improvement in predicting circuit congestion.
What this means in practice
- •For chip design engineers: Improve the evaluation of chip placement quality faster by predicting routing issues without running full routing processes.
- •For eda tool developers: Integrate advanced routability prediction into electronic design automation software to enhance placement optimization workflows.$Commercial implications: Enables new or enhanced routing prediction features for EDA tools sold to chip designers, improving design cycle efficiency.
Authors
Yule Sheng, Yue Yuan, Shan Shen, Daying Sun
Abstract
Routability prediction enables rapid evaluation of placement quality without routing, providing effective feedback for routability-driven placement optimization. Recent machine learning methods have achieved efficient routability prediction through data-driven approach. However, their prediction performance highly depends on the capability of input representations to capture essential circuit information. To address the limitations of existing circuit representations in simultaneously preserving logical topology, physical layout and routing resource information, this paper proposes HGRP, a heterogeneous graph neural network for routability prediction. HGRP models the cells, nets, and routing grids as distinct types of nodes and explicitly represents topological connectivity, spatial mapping, and grid adjacency, thereby constructing a heterogeneous graph representation that preserves multi-level circuit semantics. Based on the representation, a heterogeneous message passing mechanism is developed to enable information interaction and feature fusion among distinct types of nodes, effectively learning the complex correlations between circuit structures and routing behaviors. Experimental results on the CircuitNet dataset show that HGRP improves F1-score by 18.69\% relative improvements compared with the state-of-the-art in the congestion prediction task. The source code is publicly available at https://github.com/ShenShan123/HGPR.