DFIT opens dataflow accelerators to detailed performance analysis
DFIT: A Framework for Building Instrumentation Tools Across Heterogeneous Dataflow Accelerators
Hardware Architecture
Summary
Dataflow accelerators are special computer chips that speed up machine learning but are very hard to understand and debug. The authors created DFIT, a tool that lets developers peek inside these chips to see how work flows and where time is spent. DFIT works across different brands of accelerators without changing the tool itself. This helps improve performance tuning and debugging for these advanced chips.
What this means in practice
- •For compiler engineers: Gain transparent insights into dataflow execution to better optimize machine learning compilers targeting various accelerators.
- •For system designers: Analyze and debug accelerator behavior across different hardware platforms to improve performance and reliability.
Authors
Md. Azahar Alam, Abrar Hossain, Kishwar Ahmed
Abstract
Emerging dataflow accelerators offer exceptional energy efficiency and throughput for machine learning workloads, yet remain largely opaque to developers for performance analysis. Unlike CPUs and GPUs, where instrumentation frameworks enable fine-grained introspection, dataflow hardware exposes little information. This lack of transparency limits the ability of compiler engineers, system designers, and application developers to analyze, tune, or debug accelerator behavior. In this paper, we introduce DFIT (DataFlow Accelerator Instrumentation Tool), an instrumentation framework designed specifically for dataflow architectures. DFIT directly instruments operations, regions, and compiler transformations at the graph IR and backend-lowering stages using semantic program representation. DFIT captures high-level, semantically meaningful data that reflect the true dataflow of computation. These data can be exported for visualization and analysis. Our approach demonstrates how instrumentation can be generalized beyond traditional hardware to support heterogeneous architectures, providing portability without modifying tool logic. By opening the black box of dataflow execution, DFIT establishes a foundation for new classes of performance analysis tools for AI accelerators. It provides a practical path toward reproducible, architecture-aware introspection across heterogeneous systems, bridging the long-standing visibility gap between compiler design, runtime scheduling, and hardware realization. Evaluation across Cerebras, SambaNova, and TPU shows practical overhead of 3.53%-13.62% across instrumentation modes with robust cross-platform portability.