Full application simulator enhances computing directly in DRAM memory
A gem5-based Simulation Framework for Computing-in-DRAM
Hardware ArchitectureEmerging Technologies
Summary
Computing directly inside DRAM memory can speed up certain tasks and cut energy use, but it needs special controllers and ways to organize data. The authors created gem5-CIMD, a simulator based on an updated gem5 platform, that can run entire programs using many operations inside DRAM. Their tool includes smart memory management and models important DRAM refresh cycles. They also provide code libraries and tested the simulator on practical examples like K-nearest neighbors. This simulator is publicly available for others to use and build upon.
What this means in practice
- •For computer architects: Test full applications that perform computation inside DRAM to optimize memory-bound workloads with accurate hardware timing and memory management.
- •For programming tool developers: Develop and evaluate compiler and memory allocation techniques that target computing-in-DRAM operations using the provided CIM standard library and allocator.
Authors
Alexander Kusnezoff, João Paulo C. de Lima, Jeronimo Castrillon, Asif Ali Khan
Abstract
Computing-in-Memory using DRAM (CIMD) has demonstrated substantial energy and throughput gains for memory-bound workloads consisting of bulk-bitwise operations, by performing computation directly within DRAM subarrays. Realizing CIMD, however, requires a redesign of the memory controller and careful mapping of operands onto the memory arrays. Presently, accurate FPGA-based testbeds exist, but they are costly and labor-intensive, while open-source simulators are largely trace-based and cannot execute full application runs. The only full-application CIMD simulator available, included with MIMDRAM, is built on an outdated version of gem5 and its toolchains. We present gem5-CIMD, a full-application CIMD simulation framework built on the latest version of gem5. We extend the simulated instruction set from four bitwise operations to sixteen CIM instructions spanning arithmetic, relational, conditional, and utility operations across a range of data types and bitwidths (4 to 64 bits). A complete memory-management stack comprising multi-level huge-page support, a CIM-aware allocator, and a subarray-aware address-mapping scheme ensures that CIM operands are co-located in the same DRAM subarray. In addition, gem5-CIMD is aware of the DRAM refresh interval and faithfully models and schedules the mandatory refresh operations when needed. We provide a CIM standard library intended as a compiler target and evaluate gem5-CIMD on multiple case studies including an end-to-end KNN workload. The simulator sources, including the evaluated workloads, are publicly available.