Megartron chip boosts edge AI speed and density with mixed memory design
MEGATRON: a 28nm Analog PCM CiM/Digital System-on-Chip for Edge GenAI at 57.5 TOPS/W and 1.52 Mparam/mm${}^2$
Hardware Architecture
Summary
Making smart devices work faster and use less power is a big challenge. The authors built a new computer chip called Megatron that mixes young, low-power memory technology with traditional processors to help AI work better at the device level. This chip can do many AI calculations very quickly while taking less energy and storing more data in a small space. It could help bring advanced AI to gadgets like phones or sensors.
What this means in practice
- •For edge device engineers: Build AI-enabled gadgets that run complex models with low power using a combined analog and digital chip.$Commercial implications: Enables commercial edge AI products with improved energy efficiency and model size using a dense analog memory with processors.
- •For embedded system developers: Integrate a hybrid chip that offers both flexible digital processing and fast analog AI computing in a compact design.
Authors
Alessandro Nadalini, Angelo Garofalo, Lorenzo Greco, Andrea Belano, Alessio Antolini, Francesco Zavalloni, Andrea Lico, Riccardo Zurla, Emanuela Calvetti, Luigi Croce, Marco Pasotti, Alessandro Cabrini, Eleonora Franchi Scarselli, Davide Rossi, Francesco Conti
Abstract
We present MEGATRON, a heterogeneous Edge GenAI System-on-Chip in 28nm FD-SOI CMOS technology combining a non-volatile analog in-memory-computing engine based on a 4Mi-cell phase-change memory (PCM) array with a digital RISC-V-based flexible neural processing unit. MEGATRON demonstrates up to 3.5 TOPS/W using the RISC-V processors and 57.5 TOPS/W with PCiM, at a storage density of 1.52 Mparam/mm${}^2$ with 4-bit effective weight precision.