Routing delays cause silent data errors in Zynq UltraScale plus chips
From Routing Delay Shifts to Silent Data Corruption: Neutron-Induced SEU Effects in AXI-Based Zynq UltraScale+ MPSoCs
Hardware ArchitectureEmerging Technologies
Summary
Some advanced computer chips called Zynq UltraScale+ MPSoCs use tiny electronic paths to move data. When exposed to high-energy particles like neutrons, these paths can slow down without showing obvious errors. The authors show that these slight slowdowns can quietly corrupt data without warning in the chip’s communication system. They tested real chips with neutron beams and simulated faults, connecting timing issues to data mistakes for the first time. This helps designers build more reliable chips for radiation-heavy environments.
What this means in practice
- •For hardware engineers: Improve reliability designs in AXI-based MPSoCs exposed to radiation by addressing routing delay-induced silent data errors identified in this study.
- •For avionics system integrators: Use experimentally validated data on neutron-induced faults to enhance fault tolerance in FPGA-based control systems for aircraft operating at high altitudes.
Authors
Mostafa Darvishi
Abstract
SRAM-based FPGA system-on-chip devices are vulnerable to single-event upsets (SEUs) in configuration memory, which may perturb programmable routing resources and degrade communication fabrics. In modern Zynq UltraScale+ MPSoCs, such routing disturbances can introduce small propagation delay shifts that remain logically transparent yet compromise AXI-based data transfers and lead to silent data corruption. Although routing delay degradation and AXI interconnect failures have been studied independently, their experimental correlation under neutron irradiation has not been established. This work presents a cross-layer investigation on a ZCU104 platform integrating routing-dominated delay sensors with an AXI interconnect benchmark comprising replicated accelerators. Neutron irradiation experiments were conducted on the fully operational system, while a frame-level configuration fault injector implemented via the internal configuration access port enables controlled upset emulation. Measured routing delay events are statistically correlated with communication failures, and cross-sections for both timing shifts and AXI malfunctions are derived. The results experimentally demonstrate how neutron-induced routing perturbations propagate into system-level silent data corruption in UltraScale+ MPSoCs, providing insight for resilience-oriented AXI-based design in neutron-rich environments.