Integrating two approximation methods reduces circuit hardware costs
Integrating Approximate Logic Synthesis into Approximate High-Level Synthesis
Hardware Architecture
Summary
Approximate high-level synthesis (HLS) and approximate logic synthesis (ALS) are two ways to simplify electronic circuits by allowing small errors to reduce size or cost. HLS works by changing bigger instructions, while ALS changes smaller gate-level connections. The authors combined these two methods into one process, which lets designers explore more options and create better circuits. Their tests show this combined approach cuts hardware cost by about 11% compared to previous methods, while keeping errors within limits.
What this means in practice
- •For hardware design engineers: Generate cost-efficient approximate circuits by jointly optimizing high-level and gate-level synthesis steps.
- •For embedded systems developers: Reduce hardware resource usage in approximate accelerators by using integrated approximate synthesis methods.
Authors
Jian Shi, Ruicheng Dai, Chang Meng, Yue Yang, Weikang Qian
Abstract
Approximate high-level synthesis (HLS) and approximate logic synthesis (ALS) are two techniques for generating approximate circuits. They operate at different granularities. Approximate HLS typically modifies instructions in a control and data flow graph, whereas ALS modifies gates and interconnects in a gate-level netlist. The absence of a unified framework combining these techniques limits the potential for joint optimization. To bridge this gap, we propose to integrate ALS into the flow of approximate HLS. This integration expands the design space of approximate HLS by introducing fine-grained approximation induced by ALS, thereby generating approximate circuits with higher quality. Experimental results show that under the same error bound, our method reduces the hardware cost by 11% on average compared to the state-of-the-art methods.