NAQsim enables fast fault-tolerant quantum computing with neutral atoms
NAQsim: Full-Stack Architecture Simulation Framework for Fast and Space-Efficient Neutral Atom Quantum Computing
Hardware Architecture
Summary
Neutral-atom quantum computers are slow compared to other types, making it hard to build reliable and efficient systems. The authors created NAQsim, a tool that simulates these computers from hardware to software in detail. Using NAQsim, they found a big slowdown cause called patch rotations and designed a new way to avoid them, speeding up the computer over twice as fast. This shows how deeper simulation can help improve future quantum machines.
What this means in practice
- •For quantum hardware engineers: Optimize hardware designs for neutral-atom quantum computers by simulating performance bottlenecks and architecture trade-offs with NAQsim.
- •For quantum software developers: Test and improve quantum error-correction protocols and gate scheduling using detailed simulations of quantum stacks provided by NAQsim.
Authors
Yosuke Ueno, Shinichi Sunami, Toshihide Hinokuma, Yasunari Suzuki, Akihisa Goban, Hayata Yamasaki, Teruo Tanimoto, Ilkwon Byun
Abstract
Technological advances in neutral-atom platforms have opened a new path toward designing efficient protocols for fault-tolerant quantum computing (FTQC). However, each physical operation is still orders of magnitude slower than on other platforms, such as superconducting qubits. Therefore, architects must identify fast and efficient FTQC architectures, which require reliable modeling tools to explore various design choices across the software, classical hardware, and quantum device stacks of neutral-atom platforms. In this paper, we propose NAQsim, an open-source simulation framework for neutral-atom FTQC architectures based on transversal gates. As its key feature, NAQsim enables detailed full-stack architecture evaluation that opens opportunities to explore previously overlooked performance bottlenecks. As a first use case for NAQsim, we identify one such bottleneck, patch rotations, perform full-stack co-optimization, and finally derive a near-rotation-free architecture (D3-ROT). For practical FTQC benchmark workloads, D3-ROT achieves a 2.27x speedup from this single bottleneck alone, with minimal footprint overhead. These results point to a much broader space of full-stack optimizations that NAQsim makes accessible for transversal surface-code architectures and beyond.