Decoder timing reveals hardware identity and error rates in fault-tolerant quantum computers

Hardware Fingerprinting FTQC via Quantum Decoder Timing

Cryptography and Security

Summary

As quantum computers become more advanced and error-correcting, the time it takes to process error checks can unintentionally reveal information about the machine. The authors found that by measuring how long a classical decoder takes to analyze errors on quantum processors, someone can identify which device is in use, estimate how often errors occur, and even tell how the machine is set up. They tested this on multiple IBM quantum processors and a Google quantum chip simulator, showing the timing differences are consistent and unique enough to act as a fingerprint.

What this means in practice

Authors

Friedrich Doku, Jakub Szefer, Kaitlin N. Smith

Abstract

As the quantum computing field transitions toward Fault-Tolerant Quantum Computing (FTQC), intensive efforts are focused on scaling architectures and realizing active error correction. However, this shift introduces security surfaces that remain largely unexplored. Fault-tolerant quantum computers pair a quantum processor with a classical decoder that sits on the critical path of every syndrome-extraction round. For the first time, this work demonstrates that the wall-clock time each decoder takes to process a syndrome measurement and decoding round constitutes a novel, exploitable hardware side channel on physical quantum hardware. Using per-shot decoder timings from three IBM Heron processors collected over a 68-day window, the decode-time distribution alone allows a passive observer to (i) reconstruct the shot-by-shot detector-firing distribution and estimate the workload's logical error rate $p_L$, (ii) infer the code distance in use, and (iii) fingerprint the specific physical device with up to 89% accuracy (a random guess is 33%), with a pooled two-sample Kolmogorov-Smirnov test confirming the decode-time distributions are statistically distinct. In noisy simulation inspired by public data from Google's 105-qubit Willow processor, decoder timing further distinguishes 9 surface-code patches at different locations on the chip with 81% accuracy, showing the side channel persists on below-threshold fault-tolerant hardware from a different vendor and code family.