FPGAs speed up privacy encryption with adaptive key switching
FPGA Acceleration of Fully Homomorphic Encryption with Adaptive Key Switching
Cryptography and SecurityHardware Architecture
Summary
Fully Homomorphic Encryption (FHE) allows data to stay private while computers work on it, but it is very slow. The researchers studied two ways to do a key step called key-switching and found each has its strengths depending on hardware and settings. They built a system on a special chip called an FPGA that can switch between these methods during use to run faster overall. Tests showed their approach made important FHE tasks run around two to three times faster than previous FPGA solutions.
What this means in practice
- •For cloud service providers: Accelerate privacy-preserving computations on encrypted user data using adaptable FPGA technology to improve response times in secure cloud services.
- •For secure machine learning teams: Speed up encrypted image classification by dynamically choosing efficient key-switching methods on FPGA hardware.
Authors
Zhihan Xu, Jayashree Adivarahan, Rajgopal Kannan, Viktor K. Prasanna
Abstract
Fully Homomorphic Encryption (FHE) enables privacy-preserving cloud services but incurs substantial computation overhead, making hardware acceleration essential. Among FHE operations, key-switching is a major performance bottleneck. Recent cryptographic advances introduce a novel key-switching method (i.e., KLSS) that reduces certain operational complexity but demands higher computational precision than the traditional Hybrid Key Switching (HKS) method. This trade-off leads to distinct computation and memory requirements, making the relative latency of KLSS and HKS highly dependent on hardware parallelism, FHE security parameters, and available on-chip memory capacity, particularly on FPGA platforms, where memory resources and parallelism must be carefully balanced. In this work, we first propose a memory-efficient KLSS datapath that eliminates off-chip ciphertext transfers. We then develop a performance model to analyze and compare the overheads of both KLSS and HKS. Our analysis reveals that an adaptive solution supporting both methods can achieve lower overall latency than a static method during FHE computation. Guided by the performance model, we design an adaptive FPGA-based FHE accelerator that dynamically selects between HKS and KLSS during computation. We implement the accelerator on an Alveo U280 and evaluate it across multiple FHE benchmarks. Experimental results demonstrate that our adaptive solution achieves a 1.84-3.31$\times$ speedup in bootstrapping latency and a 1.66-2.52$\times$ speedup in secure image classification compared to state-of-the-art FPGA accelerators.