Improving qubit mapping for dynamic hierarchical quantum circuits
Mapping Dynamic, Hierarchical Quantum Circuits
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Summary
Quantum computers perform calculations using quantum bits or qubits, which must be arranged efficiently to work well. Mapping qubits for circuits that change based on measurements and include many layers is difficult, and current methods do not handle this well. The authors introduce a new way to map these complicated, changing circuits more effectively by breaking them into smaller parts and ensuring consistent connections between these parts. This approach leads to fewer extra operations, shorter circuits, faster execution, and less error when tested on large quantum processors.
What this means in practice
- •For quantum hardware engineers: Optimize physical qubit layouts in large quantum processors to reduce overhead and improve performance for dynamic quantum algorithms.
- •For quantum software developers: Develop compilers that better handle complex quantum algorithms with data-dependent control flow by using hierarchical qubit mapping techniques.
Authors
Marouane Benbetka, Merwan Bekkar, Bokyeong Yoon, Riyadh Baghdadi, Martin Kong
Abstract
Qubit mapping is a critical pass in quantum compilation. Despite various advances, dynamic circuits, those exhibiting data dependent control-flow, often resulting from qubit measurements, are not yet supported by the vast majority of available qubit mappers. The crucial limitation to overcome is the dependence on flat, one-dimensional representations of circuits. Further, qubit mappers currently lack compiler abstractions that capture the hierarchical nature of circuits, hindering the qubit mapping process. In this paper, 1 we introduce a new qubit mapping method and analyses to tackle hierarchical dynamic circuits. Our novelty resides in four key aspects: modeling (statically) sub-circuits in disjoint control-flow paths, introducing a novel Qubit Reconciliation pass to maintain consistency between sub-circuit and control-flow boundaries, a loop-entry remapping pass, and a refined cost function enhanced for SWAP count, circuit depth, circuit latency and error. We demonstrate the efficiency of our approach on a wide range of dynamic circuits on two monolithic Quantum Processing Units of 127 and 156 qubits, and on chiplet hexagon-based QPUs. On monolithic QPUs, our qubit mapper improves the SWAP count by up to 52%, depth by up to 18%, latency by up to 18.6%, and error by up to 40%. On chiplet architectures, we achieve improvements of up to 36% on SWAP count, 8.7% on depth, 15% on latency, and 15% of error.