A Process-Aware Hybrid Si/IGO Monolithic-3D 6T SRAM with BEOL Pass-Gates for the 2nm Node
2026-08-24 • Hardware Architecture
Hardware ArchitectureEmerging Technologies
AI summaryⓘ
The authors designed a tiny, new kind of computer memory cell called a 6T SRAM using advanced 3D stacking and special materials at a very small scale (2nm). They combined simulations and real-world fabrication steps to create the first detailed layout of this design. A clever new way to share certain parts between cells reduces resistance and keeps performance high without using extra space. Their design makes the memory cells smaller and faster, improving speed and energy efficiency compared to existing designs. This work shows a promising way to make future memory chips more compact and efficient.
6T SRAMmonolithic-3D (M3D)BEOL (Back-End-Of-Line)IGO transistornanosheet transistorstatic noise margin (SNM)contact resistanceburied power rails (BPR)Ru interconnectsprocess-aware layout
Authors
Po-Chuan Wang, Dongwon Jang, Eknath Sarkar, Alexei Svizhenko, Md. Nahid Haque Shazon, Piyush Kumar, Suman Datta, Azad Naeemi
Abstract
We propose a monolithic-3D (M3D) 6T SRAM at the 2nm node, integrating BEOL IGO pass-gates (PGs) with an all-silicon nanosheet latch, buried power rails (BPRs), and Ru interconnects. TCAD calibrated to a state-of-the-art double-gate IGO transistor with a tri-layer HfO$_2$/ZrO$_2$/HfO$_2$ (HZH) gate stack is combined with virtual fabrication and 3D parasitic extraction to realize the first process-aware layout of this topology. A novel neighbor-cell shared source/drain (S/D) bitline (BL) design enlarges the IGO contact area to mitigate contact resistance and restore PG drive without area penalty. The resulting cell achieves a 25\% footprint reduction vs the high-performance (HP) 122 Si baseline while maintaining robust static noise margin (SNM) over a wide supply voltage range. At the 128$\times$256 subarray-level, it reduces write delay by 42.2\% and EDP by 9.7\% compared to the high-density (HD) 111 Si baseline, owing to reduced cell parasitics and wordline (WL) loading from the smaller footprint.