PIMID: A Full-System Simulator with Intricacy and Diversity for Processing-in-Memory
2026-07-27 • Hardware Architecture
Hardware Architecture
AI summaryⓘ
The authors developed PIMID, a simulator that models Processing-in-Memory (PIM) systems more completely than previous tools. Unlike past simulators, PIMID supports multiple memory technologies, execution models (shared memory and message-passing), and lets processing elements be placed at different points in memory. It also simulates the full system including both host and device, giving detailed time and energy use breakdowns. Using PIMID, they found that memory type greatly affects performance and energy, and that different execution models behave differently depending on workloads and memory technology. The tool is designed to be flexible for future PIM research through plugin interfaces.
Processing-in-MemoryPIM simulatorshared memorymessage-passingDRAMSRAMnon-volatile memoryexecution modelhost-device co-simulationenergy consumption
Authors
Yuan He, Masaaki Kondo, Galen M. Shipman, Jered B. Dominguez-Trujillo, Shigeki Tomishima, Kazi Asifuzzaman
Abstract
Processing-in-Memory addresses the memory wall by co-locating computation with memory, but because real PIM hardware remains scarce, simulation is the primary way to explore the PIM design space. Yet existing PIM simulators each cover only part of that space: they typically model a single memory technology, fix processing elements at one level of the memory hierarchy, support a single execution model, and stop at the device boundary. We therefore present PIMID, an execution- and trace-driven full-system simulator that closes these gaps in one tool. PIMID supports both the shared-memory and message-passing execution models, running annotated parallel code in OpenMP and MPI side by side across eleven memory technologies (seven DRAM standards, SRAM, and three non-volatile memories); it places PEs anywhere from subarrays to logic dies, sweeps PE count and core-model fidelity, and prices the in-memory network per technology from measured congestion. Its single-process host-device co-simulation resolves an end-to-end time and energy breakdown (host preparation, device compute, and explicit boundary charges) that device-only tools cannot produce. Across the resulting dual-execution-model dataset, PIMID shows that the memory technology alone moves execution time by more than an order of magnitude and that the best host main memory is not the best PIM substrate; that regular kernels scale superlinearly with PE count as in-memory bandwidth co-scales with compute; that graph traversal under message-passing hits a collective-communication wall absent under shared memory; and that at full-system scope the offload trades time for energy only on the bandwidth-class memory: shared-memory offload saves energy on HBM3 while a 16-core host keeps every end-to-end time win. PIMID's plugin interfaces let new engines and models be added through standardized YAML specifications as PIM technology evolves.