MechMem-RTL: Reusing Verified Mechanism Memories for LLM-Based RTL Repair
Software EngineeringHardware Architecture
Summary
The authors created MechMem-RTL, a system that helps fix problems in hardware designs by reusing past confirmed fixes instead of just relying on how similar the problem sounds in text. This new method matches exact hardware failure evidence rather than text descriptions, making repairs more accurate. They tested MechMem-RTL on many hardware tasks and found it fixed more problems than older methods that use text similarity or generic feedback. Their work shows a better way to apply past repair knowledge for hardware debugging.
Authors
Mingyu Cheng, Junjie Gao, Jinhua Cui, Kuncai Zhong
Abstract
Large language models (LLMs) can automatically repair register-transfer-level (RTL) designs. However, fixing complex sequential logic errors requires reusing past debugging experience. Existing retrieval-augmented generation (RAG) relies on task-text similarity to provide this experience. This text-based approach often misguides the model because natural language poorly reflects cycle-level hardware execution semantics. To address this, we present MechMem-RTL, a repair framework that reuses verifier-confirmed repair records instead of text similarity. Each stored record strictly links trigger evidence, a diagnosed failure mechanism, a local repair action, preservation constraints, and a verification summary. For a new failure, MechMem-RTL injects a past record only when deterministic verifier evidence is strictly compatible with the stored trigger. Otherwise, the system uses only current verifier evidence. We evaluate MechMem-RTL on 48 public sequential RTL tasks across six repair models. With at most two repair attempts per task, MechMem-RTL successfully resolves 180 out of 288 task-model pairs, outperforming standard feedback repair (109 pairs) and task-similarity RAG (107 pairs).