SPAC: Automating FPGA-based Network Switches with Protocol Adaptive Customization
2026-04-23 • Networking and Internet Architecture
Networking and Internet ArchitectureHardware Architecture
AI summaryⓘ
The authors developed SPAC, a tool that helps create custom network switches on FPGAs tailored to specific communication needs of different applications. SPAC uses a special language and design tools to quickly find the best switch designs by analyzing real traffic patterns before building them. Their experiments show that these custom switches use fewer hardware resources and reduce delays compared to standard switches, making them more efficient for both fast-response and high-throughput networking tasks.
FPGAnetwork switcheslatencythroughputhigh-level synthesis (HLS)domain-specific language (DSL)design space exploration (DSE)micro-architecturePareto-optimaldatacenter networks
Authors
Guoyu Li, Yang Cao, Lucas H L Ng, Alexander Charlton, Qianzhou Wang, Will Punter, Philippos Papaphilippou, Ce Guo, Hongxiang Fan, Wayne Luk, Saman Amarasinghe, Ajay Brahmakshatriya
Abstract
With network requirements diverging across emerging applications, latency-critical services demand minimal logic delay, while hyperscale training and collectives require sustained line-rate throughput for synchronized bulk transfers. This divergence creates an urgent need for custom network switches tailored to specialized protocols and application-specific traffic patterns. This paper presents SPAC (Switch and Protocol Adaptive Customization), a novel approach that automates the generation of FPGA-based network switches co-optimized for custom protocols and application-specific traffic patterns. SPAC introduces a unified workflow with a domain-specific language (DSL) for protocol-architecture co-design, a library of modular HLS-based adaptive switch components, and a trace-aware Design Space Exploration (DSE) engine. By providing a multi-fidelity simulation stack, SPAC enables rapid identification of Pareto-optimal designs prior to deployment. We demonstrate the efficacy of the domain-specific adaptation of SPAC across a spectrum of real-world scenarios, spanning from latency-sensitive sensor and HFT networks to hyperscale datacenter fabrics. Experimental results show that by tailoring the micro-architecture and protocol to the specific workload, SPAC-generated designs reduce LUT and BRAM usage by 55% and 53%, respectively. Compared to fixed-architecture counterparts, SPAC delivers latency reductions ranging from 7.8% to 38.4% across various tasks while maintaining adequate resource consumption and packet drop rate.