Papers for

ai hardware architects

Papers whose findings have a practical use for this group, as judged from the abstract. Open a paper to read what it means in practice.

Probabilistic models run over 1000 times faster on new memory hardware

Bio-inspired Learning and Decision-Making with Probabilistic In-Memory Computing Hardware: Part 2

Abstract: This report extends our previous work (Part 1), which introduced an energy-based model for learning and decision-making under uncertainty. The model leverages stochastic Langevin dynamics to continuously evolve approximate probability distributions over neuron states and model weights. However, as noted in Part 1 and confirmed through GPU-based implementations, large-scale probabilistic energy-based models of this nature face significant scalability challenges due to excessive execution latency. This latency stems from a fundamental mismatch: massively parallel models with low arithmetic intensity (such as energy-based models) are being executed on processor architectures like GPUs that rely on high-bandwidth memory (HBM) interfaces. The HBM imposes brutally sequential execution constraints on inherently parallelizable models, creating the false impression that such models are unscalable. In reality, it is the GPU architecture itself, with its dependence on HBM interfaces, that is not a scalable processor architecture for this class of AI model. In this report, we demonstrate using a detailed transaction-level model (TLM) of a probabilistic analogue in-memory computing (AIMC) processor that the same energy-based model can execute well over 1000x faster than data-center-grade hardware by eliminating the HBM interface and performing computation directly within on-chip memory.

Thu 10 SeptHardware Architecture
The gist
Probabilistic energy-based models help with learning and decision-making but are very slow on traditional GPUs due to how they access memory. The authors show that the problem is not the models themselves but the GPU memory design, which forces slow processing. Their new approach uses analogue in-memory computing, which performs calculations directly where data is stored, bypassing slow memory steps. This new hardware design can run the same models more than 1000 times faster than current high-end data-center GPUs.
Open 2609.11288v1